===== SPM Xeon PHI access 2014 ===== === Machine name === The machine is not registered on the DNS, you should use the IP address * 131.114.137.225, corresponding to the registered name * r720-phi.itc.unipi.it === Account === You should request the account to the SPM teacher sending an email with * SUbject: SPM PHI ACCOUNT * Body: name, family name enrollement number and either CS or MCSN in case you are enrolled in Computer Science or in Computer Science and Networking Once you have the account (will be an "spm14XX") you may access the host with the Xeon PHI board by * ssh spm14XX@131.114.137.225 === Environment settings === In order to be able to use the tools, you have to run the script in * **/opt/intel/composerxe/bin/compilervars.sh intel64** that will set up the proper compiler and library paths. I suggest you to make the execution of the script automatic by inserting the call to the script in the **.bashrc** configuration file of your home directory (add a line such as **/opt/intel/composerxe/bin/compilervars.sh intel64** at the end of this file) === Compiling and running code on the PHI === IN order to run a program on PHI: - compile it on the host using **icc** with the additional flag **-mmic** - copy the executable to the mic0 or mic1 with a **scp a.out mic0:** - execute it on the mic: **ssh mic0 ./a.out Please take into account that a minimal set of libraries is available on the mic. === FastFLow === Please take into account that you need to inlcude the flag -DNO_DEFAULT_MAPPING when compiling FastFlow programs, as the default mapping at the moment assumes a core numbering such as the one used for Sandy/Ivy Bridge (0 first context of the first core, 1 first context of the second core ...) processors, which is different from the one used on PHI (0 first context of the first core, 1 second context of the first core ...). === MIC0 and MIC1 === You can use both the accelerators available on the machine (namely MIC0 and MIC1), despite the fact the examples in this page alway use mic0 ... === Documentation === Available documentation on the Xeon PHI and the relative programming tools may be accessed at the [[https://software.intel.com/en-us/mic-developer|Intel Xeon PHI Developer Zone]]